1. Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to procedures used to reduce the native oxide on the surface of a semiconductor substrate prior to growth of a gate insulator layer.
2. Description of Prior Art
Micro-miniaturization, or the ability to fabricate semiconductor devices comprised of sub-micron features, has allowed the performance of semiconductor devices to be increased while the processing costs for a specific semiconductor chip comprised with sub-micron devices has been reduced. Part of the device performance increase is achieved via reductions of performance degrading parasitic junction capacitance as a result of the use of smaller device features. In addition the ability to obtain a greater amount of smaller semiconductor chips from a specific size starting substrate, still providing device densities equal to or greater than counterpart larger semiconductor chips in turn comprised with devices with larger features, result in a reduction of the fabrication cost for the specific, smaller semiconductor chip comprised with sub-micron features.
As the features of specific devices such as a metal oxide semiconductor field effect transistor (MOSFET), device are scaled down, specific aspects of the device such as gate insulator thickness has to also be scaled down. It is therefore imperative that the integrity of these thinner gate insulator layers be insured. The processes used to thermally grow silicon dioxide gate insulator layers always include a series of pre-clean procedures used to remove organic as well as inorganic contaminants from the surface of the semiconductor substrate that a gate insulator will be thermally grown on. However the pre-clean procedures are performed using wet solutions resulting in growth of native oxide on the cleaned semiconductor surface. The wet clean procedures employed are comprised with sulfuric acid and hydrogen peroxide which can result in the unwanted growth of about 15 Angstroms of native oxide. The low temperature of formation of the native oxide, about 100xc2x0 C. or less, results in a native oxide exhibiting poor dielectric characteristics when compared to silicon dioxide layers grown at temperatures greater than 800xc2x0 C. Therefore if a MOSFET device is designed for a 20 Angstrom gate insulator layer, designed to provide the desired device characteristics such as threshold voltage, the major portion of the gate insulator layer will be comprised of poor quality native oxide. The poor quality gate insulator layer can result in unwanted leakage or dielectric breakdown during operation.
The present invention will describe a method of forming a thin gate insulator layer in which a combination of pre-clean procedures results in zero Angstroms of native oxide prior to the thermal growth of a silicon dioxide gate insulator layer. The combination of pre-clean procedures comprised of a wet solution followed by an anneal procedure, performed in situ prior to gate insulator growth, results in a gate insulator layer not comprised with native oxide, with the entire thickness of the gate insulator layer obtained via thermal oxidation procedures, in contrast to counterparts wherein a portion of the gate insulator layer thickness resulted from a wet pre-clean procedure. The resulting thermally grown silicon dioxide gate insulator layer exhibits reduced leakage and improved dielectric breakdown characteristics when compared to counterpart gate insulator layers partially comprised with native oxide. Prior art, such as Yu et al, in U.S. Pat. No. 6,319,784 B1, Chuang, in U.S. Pat. No. 6,362,081 B1, Hwang et al in U.S. Pat. No. 6,352,941 B1, and Shields, in U.S. Pat. No. 6,239,006 B1, describe procedures to remove native oxide from semiconductor surfaces prior to either growing, or forming an overlaying layer on the cleaned surface. However none of these prior art describe the novel combination of process steps employed in this present invention, allowing all native oxide to be removed prior to thermal growth of a silicon dioxide gate insulator layer.
It is an object of this invention to thermally grow a silicon dioxide gate insulator on a semiconductor substrate.
It is another object of this invention to remove organic and inorganic contaminants from the surface of the semiconductor surface prior to thermal growth of the silicon dioxide gate insulator layer.
It is still another object of this invention to employ a combination of process steps featuring a hydrofluoric acid dip followed by an anneal procedure performed in situ in the same chamber to be used for the thermal oxidation procedure, to remove native oxide on the semiconductor substrate formed during the organic and inorganic pre-clean procedures, prior to the in situ thermal oxidation procedure.
In accordance with the present invention a process for thermally growing a silicon dioxide gate insulator layer on a semiconductor substrate featuring a combination of process steps used to totally remove native oxide from the surface of the semiconductor substrate prior to the thermal oxidation procedure, is described. A series of wet clean procedures is performed to a semiconductor substrate prior to a thermal oxidation procedure. A first cycle of the wet clean procedure features the use of sulfuric acid and hydrogen peroxide removing organic contaminants, while a second cycle of the wet clean procedure featuring the use of HCl and hydrogen peroxide, is used to remove inorganic contaminants such as metals. The wet clean procedures result in the growth of native oxide on the surface of the semiconductor substrate. A series of process steps are performed to totally remove the native oxide prior to thermal growth of the silicon dioxide layer. A hydrofluoric acid dip removes the native oxide and places fluoride ions on the surface of the semiconductor substrate restricting the regrowth of native oxide to less than 5 Angstroms. An anneal procedure performed in the chamber to be subsequently used for thermal growth of the silicon dioxide gate insulator layer, is employed to remove the thin regrown native oxide resulting in an oxide free semiconductor surface. The silicon dioxide gate insulator layer is then in situ grown in the same chamber used for the anneal procedure.